Objective VHDL provides single inheritance for entity classes. The following example shows implementation of the counter class hierarchy with entity classes:

entity up_down_counter is new counter with
  procedure count_down;
end up_down_counter;

entity address_counter is new counter with
  procedure count_up;
end class address_counter;

The up_down_counter entity declares a new count_down method whereas the address_counter entity redeclares the count_up method.

The derived entities inherit from the parent entity counter:

  • ports & generics
  • attributes & methods
  • other declarations & statements of parent entity

Implementation of architectures of derived entities:

architecture CounterArch of up_down_counter
      is new CounterArch of Counter with
  procedure count_down is
  begin
    load ( value - 1 );
  end;
begin
end CounterArch;

architecture CounterArch of address_counter
      is new CounterArch of Counter with
  procedure count_up is
  begin
    load ( value + 4 );
  end;
begin
end CounterArch;

Because VHDL allows to define more than one architectures for one entity, inheritance on entity classes is split into derivation of entities and derivation of architectures.